This invention relates generally to operational amplifiers, and more particularly, to an all NPN monolithically integrable output stage for an integrated operational amplifier which exhibits an improved gain characteristic.
The majority of commercially available operational amplifiers which possess both pull-up and pull-down output capability include PNP devices as part of the output stage. For example, see U.S. Pat. No. 3,660,773. To achieve a higher frequency response, greater output swing, reduce output stage emitter-follower peaking and to simplify the integrated circuit construction, it has been found desirable to provide an output stage which incorporates only NPN transistors. Such an output circuit shown and described, in co-pending patent application Ser. No. 295,880 entitled "Output Stage For Operational Amplifier" and assigned to the assignee of the present invention. While the circuit shown and described exhibits satisfactory phase margin (i.e. excess phase at unity gain), the gain characteristic of the device is such that after it passes down through the unity gain frequency, the gain rises again at a higher frequency. If the device has gain at the point where the phase approaches zero, the circuit will oscillate. This tendency to oscillate at higher frequencies in the unity gain configuration renders the frequency response of the device undesirable.